Service manual

2.7.4 Block Diagram
TFT LCD Module
Backlight Unit
2.7.5 Pixel Format
2.7.6 Interface Pin Connection
Backlight Unit
TFT LCD Module
Note (1) Please connects NC pin to nothing. Don’t
connect it to ground nor to other signal input.
(NC pin should be open.)
Note (2) The module used a100ohm resistor between
positive and negative data lines of each
receiver input.
2.7.7 Electrical Characteristics
TFT LCD Module
Note (1) White and V-color
Mosaic: Dot checker image
Symbol Min. Typ. Max. Unit Note
VDD 4.5 5.0 5.5 V
White IDD0 260 360 460 mA (1)
V-Color IDD1 370 470 570 mA (1)
Mosaic IDD2 515 615 715 mA (1)
fV 56 60 75 Hz ref 6.5 t1
fH 55.469 55.935 70.635KHz ref 6.5 t4
fDCLK 44.375 53.25 68.375MHz ref 6.5 t7
IRush - - 1.5 A (2)
Hsync frequency
Frequency
Input rush current
Item
Current of power supply
Voltage of power supply
Vsync frequency
Terminal no. Symbol Function Note
1 GND Ground
2 VDD Power Supply : +5.0V
3 VDD Power Supply : +5.0V
4 NC Reserved for supplier test point
5 NC Reserved for supplier test point
6 NC Reserved for supplier test point
7 NC Reserved for supplier test point
8 Odd_Rin0- - LVDS differential data input (R0-R5, G0) (2)
9 Odd_Rin0+ + LVDS differential data input (R0-R5, G0) (2)
10 GND Ground
11 Odd_Rin1- - LVDS differential data input (G1-G5, B0-B1) (2)
12 Odd_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (2)
13 GND Ground
14 Odd_Rin2- - LVDS differential data input (B2-B5,NC,NC,DE) (2)
15 Odd_Rin2+ + LVDS differential data input (B2-B5,NC,NC,DE) (2)
16 GND Ground
17 Odd_ClkIN- - LVDS differential clock input (2)
18 Odd_ClkIN+ + LVDS differential clock input (2)
19 GND Ground
20 Even_Rin0- - LVDS differential data input (R0-R5, G0)
21 Even_Rin0+ + LVDS differential data input (R0-R5, G0)
22 GND Ground
23 Even_Rin1- - LVDS differential data input (G1-G5, B0-B1)
24 Even_Rin1+ + LVDS differential data input (G1-G5, B0-B1)
25 GND Ground
26 Even_Rin2- - LVDS differential data input (B2-B5,NC,NC,DE)
27 Even_Rin2+ + LVDS differential data input (B2-B5, NC, NC, DE)
28 GND Ground
29 Even_ClkIN- - LVDS differential clock input
30 Even_ClkIN+ + LVDS differential clock input
Terminal No. Symbol Function
1 VL CCFL power supply (high voltage)
2 NC No connection
3 GL CCFL power supply (low voltage)
Connector CN1
TCON with
LVDS Receiver
DC/DC
Converter
Gamma
Reference
Voltage
Generator
Y-driver IC
X-driver IC
Liquid Crystal
Panel 1440x900
pixels
2. Flat Panel Specification (continued)
10
Go to cover page
ACER AL1716W