User`s manual

Am486
®
Microprocessor PCI Customer Development Platform User’s Manual
2-28
ISA Bus Interface (A7)
The PCI CDP is populated with two standard ISA bus connectors (parts SL1 and
SL2) for developers who need to use ISA devices in their development systems.
The ISA bus interface is provided by the chipset’s M1497 southbridge.
ISA devices that use the F00000h to FFFFFFh address space cannot be used on
the PCI CDP, because this area is used by the ISA Flash memory bank. See “ISA
Flash Memory (F20)” on page 2-23.
ISA devices that use the C0000h to DFFFFh address space cannot be used if this
space is enabled for boot ROM addressing. See “Boot ROM (C16)” on page 2-21.
Boot ROM addressing in this range might also cause conflicts with devices using
the D0000h to DFFFF address space.
Super I/O (C19)
The PCI CDP uses an M5113 Super I/O chip to provide standard PC input/output
functions. The Super I/O chip provides:
• Two 16450/16550-compatible serial ports
• IrDA 1.0 infrared interface
• AT-compatible parallel port
• 82077-compatible floppy disk interface
The BIOS supplied with the platform configures these peripherals to operate as
they would on a standard PC. See the Acer Laboratories Inc. M5113 data sheet for
detailed configuration information.