User`s manual

Am486

Microprocessor PCI Customer Development Platform

2-19

PCI Bus (I7)

The PCI CDP has two desktop-PC-style PCI expansion connectors (parts SLT1

and SLT2) to allow the installation of a wide array of off-the-shelf 5-V PCI devices.

These include standard devices such as video, sound, SCSI, or PCMCIA adapters,

or diagnostic devices such as PCI bus analyzers, extender cards, and other

diagnostic hardware. The slots do not support 3.3-V PCI peripherals. The PCI bus

is implemented via the chipset’s M1489 northbridge chip except for bus arbitration,

which is handled by the M1487.

For PCI bus configuration, connector SLT1 is addressed as Device 3 and SLT2 is

addressed as Device 4. See Table 2-2, “PCI Configuration Addressing,” on page 2-11.

The PCI bus connector’s interrupt signals are routed as shown in Table 2-6. (The

Ethernet interrupt signal is also shown for reference.) The initialization code

dynamically assigns PCI interrupts to an interrupt request (IRQ) in the chipset’s

PCI INTx routing table mapping registers. See the chipset documentation for

details on the mapping registers.

Table 2-6. PCI Bus Interrupt Routing

PCI Bus Interrupt PCI Slot 1 Signal PCI Slot 2 Signal Ethernet Signal

INT0 INTA INTD —

INT1 INTB INTA —

INT2 INTC INTB INTA

INT3 INTD INTC —