Datasheet

Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1 7
6-16 PCIConfigRd() Response Definition .................................................................... 113
6-17 PCIConfigWr() Device/Function Support ............................................................. 114
6-18 PCIConfigWr() Response Definition.................................................................... 115
6-19 Mailbox Command Summary ............................................................................ 116
6-20 Counter Definition ........................................................................................... 117
6-21 Machine Check Bank Definitions ........................................................................ 119
6-22 ACPI T-state Duty Cycle Definition..................................................................... 120
6-23 MbxSend() Response Definition......................................................................... 122
6-24 MbxGet() Response Definition........................................................................... 123
6-25 Domain ID Definition ....................................................................................... 125
6-26 Multi-Domain Command Code Reference ............................................................ 125
6-27 Completion Code Pass/Fail Mask........................................................................ 125
6-28 Device Specific Completion Code (CC) Definition.................................................. 126
6-29 Originator Response Guidelines......................................................................... 126
6-30 Error Codes and Descriptions............................................................................ 128
6-31 PECI Client Response During Power-Up (During ‘Data Not Ready’) ......................... 128
6-32 Power Impact of PECI Commands versus C-states ............................................... 130
6-33 PECI Client Response During S1........................................................................ 130
7-1 Power On Configuration Signal Options............................................................... 131
7-2 Coordination of Thread Power States at the Core Level......................................... 133
7-3 Processor C-State Power Specifications .............................................................. 135
7-4 Processor S-States .......................................................................................... 136
8-1 PWM Fan Frequency Specifications For 4-Pin Active Thermal Solution ..................... 151
8-2 Fan Specifications For 4-Pin Active Thermal Solution............................................ 151
8-3 Fan Cable Connector Pin Out for 4-Pin Active Thermal Solution.............................. 151