Datasheet

Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1 17
Intel® Xeon® Processors 5500 Series Electrical Specifications
The Intel Xeon Processor 5500 Series provides the ability to operate while transitioning
to an adjacent VID and its associated processor core voltage (V
CC
). This is represented
by a DC shift in the loadline. It should be noted that a low-to-high or high-to-low
voltage state change may result in as many VID transitions as necessary to reach the
target core voltage. Transitions above the maximum specified VID are not permitted.
Table 2-8 includes VID step sizes and DC shift ranges. Minimum and maximum voltages
must be maintained as shown in Table 2-9.
The VRM or EVRD utilized must be capable of regulating its output to the value defined
by the new VID. DC specifications for dynamic VID transitions are included in Table 2-8
and Table 2-9.
Power source characteristics must be guaranteed to be stable whenever the supply to
the voltage regulator is stable.
Table 2-2.Voltage Identification Definition (Sheet 1 of 5)
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 V
CC_MAX
000000 0 0 OFF
000000 0 1 OFF
000000 1 01.60000
000000 1 11.59375
000001 0 01.58750
000001 0 11.58125
000001 1 01.57500
000001 1 11.56875
000010 0 01.56250
000010 0 11.55625
000010 1 01.55000
000010 1 11.54375
000011 0 01.53750
000011 0 11.53125
000011 1 01.52500
000011 1 11.51875
000100 0 01.51250
000100 0 11.50625
000100 1 01.50000
000100 1 11.49375
000101 0 01.48750
000101 0 11.48125
000101 1 01.47500
000101 1 11.46875
000110 0 01.46250
000110 0 11.45625
000110 1 01.45000
000110 1 11.44375
000111 0 01.43750
000111 0 11.43125