User`s guide

The registers and their function are summarized in the following table. A more
detailed description of each register is included in subsequent sections. Within each
register are 8 bits which may constitute a byte of data or 8 individual bit set/read
functions.
Counter ControlNoneBASE +7
Counter 2 LoadCounter 2BASE +6
Counter 1 LoadCounter 1BASE +5
Counter 0 LoadCounter 0BASE +4
PCI-DIO24H/CTR3 ADDITIONAL
REGISTERS
Configure 82C55None. No read back on 82C55.BASE +3
Port C OutputPort C inputBASE +2
Port B OutputPort B InputBASE +1
Port A OutputPort A Input of 82C55BASE +0
WRITE FUNCTIONREAD FUNCTIONADDRESS
5.2 82C55 DIGITAL I/O REGISTERS
Port A Data
Base Address +0
Pin 37Pin 36Pin 35Pin 34Pin 33Pin 32Pin 31Pin 30
A0A1A2A3A4A5A6A7
01234567
Port B Data
Base Address +1
Pin 10Pin 9Pin 8Pin 7Pin 6Pin 5Pin 4Pin 3
B0B1B2B3B4B5B6B7
01234567
Ports A & B may be programmed as input or output. Each is written to and read from
in Bytes, although for control and monitoring purposes the individual bits are more
interesting.
Bit set/reset and bit read functions require that unwanted bits be masked out of reads
and ORed into writes.
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5 I/O REGISTER MAPS
The Table below shows the I/O register map of the PCI-DIO24, DIO24H and
DIO24H/CTR3. Any differences between versions of the boards are noted. Sections
5.1 through 5.6 provide additional information on each of these addresses and their
functions.
Control RegisterNo ReadbackBADR2 + 7
Counter 2 DataCounter 2 DataBADR2 + 6
Counter 1 DataCounter 1 DataBADR2 + 5
Counter 0 DataCounter 0 DataBADR2 + 4
8254 Counter REGISTERS
(For /CTR3 boards only)
Control RegisterControl register readbackBADR2 + 3
Output Port C DataInput Port C DataBADR2 + 2
Output Port B DataInput Port B DataBADR2 + 1
Output Port A DataInput Port A DataBADR2 + 0
8255 REGISTERS
(for all boards)
User I/O Control (/CTR3
board only
User I/O Status (/CTR3 board
only)
BADR1+50 h
Interrupt ControlInterrupt StatusBADR1+4C h
WRITE FUNCTIONREAD FUNCTIONREGISTER
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