User`s guide

3.3 SIGNAL CONNECTION CONSIDERATIONS
All the digital outputs and inputs on the PCI-DIO24 as well as the counter/timer sig-
nals of the PCI-DIO24H/CTR3 connector are CMOS TTL. The PCI-DIO24H signals
are buffered (high output drive) TTL. TTL is an electronics industry term, short for
Transistor Transistor Logic, which describes a standard for digital signals which are
either at 0V or 5V.
The voltages and currents associated with external devices range from less than a
hundred mA at a few volts for a small flash light bulb to 50 Amps at 220 volts for a
large electric range. Attempting to connect either of these devices directly to the PCI-
DIO24 could damage the I/O chip.
We offer a wide variety of digital signal conditioning products that provide an ideal
interface between high voltage or high current real world signals and PCI-DIO24
family. If you are trying to control or monitor non-TTL level signals with your board,
we highly recommend you look in our catalog or on our web site for the following
products.
CIO-ERB series, electromechanical relay output boards
CIO-SERB series, 10A electromechanical relay output boards
SSR-RACK series solid state I/O module racks
DR-Series, DIN rail mountable solid state I/O modules.
In addition to voltage and load matching, digital signal sources often need to be de-
bounced. A complete discussion of digital interfacing will be found in the section on
Interface Electronics in this manual.
IMPORTANT NOTE
The 82C55 digital I/O chip initializes all ports as inputs on power
up and reset. A TTL input is a high impedance input. If you con-
nect another TTL input device to the 82C55 it will probably be
turned ON every time the 82C55 is reset, or, it might be turned
OFF instead. Remember, the 82C55 which is reset is in INPUT
mode.
To safeguard against unwanted signal levels, all devices being controlled by an
82C55 should be tied low (or high, as required) by a 2.2K ohm resistor.
You will find positions for pull up and pull down resistor packs on your PCI-DIO24
series board. To implement these, please turn to the application note on pull up/down
resistors.
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The two groups of ports, group A and group B, may be independently programmed in
one of several modes. The most commonly used mode is mode 0, input / output
mode. The codes for programming the 82C55 in this mode are shown below. D7 is
always 1 and D6, D5 & D2 are always 0.
ININININ1559B1111
OUTINININ1549A0111
INOUTININ153991011
OUTOUTININ152980011
ININOUTIN147931101
OUTINOUTIN146920101
INOUTOUTIN145911001
OUTOUTOUTIN144900001
INININOUT1398B1110
OUTININOUT1388A0110
INOUTINOUT137891010
OUTOUTINOUT136880010
ININOUTOUT131831100
OUTINOUTOUT130820100
INOUTOUTOUT129811000
OUTOUTOUTOUT128800000
CLBCUADECHEXD0D1D3D4
8255 Mode 0 configurations
(D7=1, D6=D5=D2=0)
5.5 82C54 COUNTER CHIP
The 82C54 counter chip is quite complex. The data sheet for the part contains pro-
gramming information, input and output timing diagrams and interfacing specifica-
tions.
We are sorry, but it is beyond the scope of this manual to reproduce the information,
all of which is contained in the chip manufacturers data book. For that information
check out Intel’s web site at www.intel.com. A variety of information is available and
can be found by “searching” on keyword 8254.
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