User manual

Appendix D Register-Level Programming

PC-DIO-96/PnP User Manual D-16

National Instruments Corporation

Bit Name Description (Continued)

2 INTEB Interrupt Enable Bit for Port B—Setting this bit

enables interrupts from port B of the 82C55A. This bit

is controlled by setting/resetting PC2.

1 IBFB Input Buffer for Port B—A high setting indicates that

data has been loaded into the input latch for port B.

0 INTRB Interrupt Request Status for Port B—When INTEB

and IBFB are high, this bit is high, indicating that an

interrupt request is pending for port B.

At the digital I/O connector, port C has the following pin assignments

when in mode 1 input. Notice that the status of STBA* and the status of

STBB* are not included in the port C status word.

Figure D-3. Port C Pin Assignments, Mode 1 Input

Mode 1 Input Programming Example

The following example shows how to configure PPI A for various

combinations of mode 1 input. This code is strictly an example and is

not intended to be used without modification in a practical situation.

Main() {

#define BASE_ADDRESS 0x180 /* Board located at address 180 */

#define APORTAoffset 0x00 /* Offset for PPI A, port A */

#define APORTBoffset 0x01 /* Offset for PPI A, port B */

#define APORTCoffset 0x02 /* Offset for PPI A, port C */

#define ACNFGoffset 0x03 /* Offset for PPI A, CNFG */

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

I/O

IBFA

STBA*

INTRA

STBB*

IBFB

INTRB

Group A

Group B