User manual

Appendix D Register-Level Programming
© National Instruments Corporation D-9 PC-DIO-96/PnP User Manual
Bit Name Description (Continued)
2 BIRQ0 PPI B Interrupt Request for Port A—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI B sends an interrupt, INTRA, to the host
computer. If this bit is cleared, PPI B does not send the
interrupt INTRA to the host computer, regardless of
the setting of INTEN.
1 AIRQ1 PPI A Interrupt Request for Port B—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI A sends an interrupt, INTRB, to the host
computer. If this bit is cleared, PPI A does not send
the interrupt INTRB to the host computer, regardless
of the setting of INTEN.
0 AIRQ0 PPI A Interrupt Request for Port A—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI A sends an interrupt, INTRA, to the host
computer. If this bit is cleared, PPI A does not send
the interrupt INTRA to the host computer, regardless
of the setting of INTEN.