User manual

Appendix D Register-Level Programming
PC-DIO-96/PnP User Manual D-8 © National Instruments Corporation
Interrupt Control Register 1
Bit Name Description
7 DIRQ1 PPI D Interrupt Request for Port B—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI D sends an interrupt, INTRB, to the host
computer. If this bit is cleared, PPI D does not send
the interrupt INTRB to the host computer, regardless
of the setting of INTEN.
6 DIRQ0 PPI D Interrupt Request for Port A—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI D sends an interrupt, INTRA, to the host
computer. If this bit is cleared, PPI D does not send
the interrupt INTRA to the host computer, regardless
of the setting of INTEN.
5 CIRQ1 PPI C Interrupt Request for Port B—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI C sends an interrupt, INTRB, to the host
computer. If this bit is cleared, PPI C does not send the
interrupt INTRB to the host computer, regardless of
the setting of INTEN.
4 CIRQ0 PPI C Interrupt Request for Port A—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI C sends an interrupt, INTRA, to the host
computer. If this bit is cleared, PPI C does not send the
interrupt INTRA to the host computer, regardless of
the setting of INTEN.
3 BIRQ1 PPI B Interrupt Request for Port B—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI B sends an interrupt, INTRB, to the host
computer. If this bit is cleared, PPI B does not send the
interrupt INTRB to the host computer, regardless of
the setting of INTEN.
D7 D6 D5 D4 D3 D2 D1 D0
DIRQ1 DIRQ0 CIRQ1 CIRQ0 BIRQ1 BIRQ0 AIRQ1 AIRQ0