User manual

Appendix D Register-Level Programming
© National Instruments Corporation D-7 PC-DIO-96/PnP User Manual
Figure D-2. Control Word Format for the 82C53
Register Description for the Interrupt Control Registers
There are two interrupt control registers on the PC-DIO-96/PnP. One of
these registers has individual enable bits for the two interrupt lines from
each of the 82C55A devices. The other register has a master interrupt
enable bit and two bits for the timed interrupt circuitry. Of the latter two
bits, one bit enables counter interrupts, while the other selects counter 0
or counter 1. The bit maps and signal definitions are listed as follows.
BCD
D2 D1 D0D3D7
D6 D5
D4
1 = count in BCD
0 = count in binary
Mode Select
000 = mode 0
001 = mode 1
010 = mode 2
011 = mode 3
100 = mode 4
101 = mode 5
110 = mode 2
111 = mode 3
Access Mode
00 = latch counter value
01 = access LSB only
10 = access MSB only
11 = access LSB, then MSB
Counter Select
00 = counter 0
01 = counter 1
10 = counter 2
11 = illegal