User`s manual

3-16 Chapter 3
CPU to PCI Post Write
Two options are available: Enabled or Disabled. The default is Enabled, When Enable, data transmission
from CPU to PCI bus are buffered and compensate for the different speed between CPU and PCI bus. If it
is set to Disabled, data transmissions are not buffered and CPU must wait until the data transmission is
complete and then start another transmission cycle.
Vlink 8X Support:
Two options are available: Disabled or Enabled. The default setting is Enabled. This item can let you
enable the Vlink bus data transfer between northbridge and southbridge.
Enhance PCI Performance:
Two options are available: Disabled  Enabled. The default setting is Enabled. This item can improve
the PCI transmission performance.
PCI Delay Transaction:
Two options are available: Disabled or Enabled. The default setting is Enabled. The chipset has an
embedded 32-bit posted write buffer to support delay transactions cycles. Select Enabled to support
compliance with PCI specification version 2.2.
 Back to Advanced Chipset Features Setup Menu:
System BIOS Cacheable:
Two options are available: Disabled or Enabled. The default setting is Enabled. When you select Enabled,
you get faster system BIOS executing speed via the L2 cache.
Video RAM Cacheable:
Two options are available: Disabled or Enabled. The default setting is Disabled. When you select Enable,
you get faster video RAM executing speed via the L2 cache. You must check your VGA adapter manual
to find out if any compatibility problems will occur.
KD7 Series