User`s manual

BIOS Setup
AN-M2/AN-M2HD 2-9
2.4 Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
K8<->NB HT Speed Auto Item Help
K8<->NB HT Width Auto
► DRAM Configuration Press Enter
SSE/SSE2 Instructions Enabled
iGPU Frame Buffer Control Auto
x - VGA Share Memory 64M
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
K8<->NB HT Speed
This item selects the LDT Bus Frequency between CPU and Chipset.
K8<->NB HT Width
This item selects the LDT Bus Width between CPU and Chipset.
DRAM Configuration
Click <Enter> key to enter its submenu.
You may manually set the DRAM timing parameters through its sub-items, or leave them at
their default settings according to the SPD (Serial Presence Detect) data stored in the DRAM.
SSE/SSE2 Instructions
This item allows you to Enable or Disable the SSE/SSE2 (Streaming SIMD Extensions)
instruction set.
iGPU Frame Buffer Control
This item allows you to control the VGA frame buffer size automatically or manually.
VGA Share Memory
This item selects the VGA share memory size.
※ The total system memory must be twice the size of this parameter at least, or
else a lesser one will replace this parameter automatically by the BIOS utility
itself. For example: In a 256M selection with 256M total system memory size
configuration, the BIOS utility will force it down to 128M automatically.
In the applications that require higher frame buffer size, such as 3-D game, HDMI, or Blu-ray
DVD playing, please select the option [256MB] for higher video performance.