Data Sheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- Figure 2-1: DNL vs. Code.
- Figure 2-2: DNL vs. Code and Ambient Temperature.
- Figure 2-3: Absolute DNL vs. Ambient Temperature.
- Figure 2-4: INL vs. Code and Ambient Temperature.
- Figure 2-5: Absolute INL vs. Ambient Temperature.
- Figure 2-6: INL vs. Code.
- Figure 2-7: Full-Scale VOUTA w/G = 1 (VREF) vs. Ambient Temperature and VDD.
- Figure 2-8: Full-Scale VOUTA w/G = 2 (2VREF) vs.Ambient Temperature and VDD.
- Figure 2-9: Output Noise Voltage Density (VREF Noise Density w/G = 1) vs. Frequency.
- Figure 2-10: Output Noise Voltage (VREF Noise Voltage w/G = 1) vs. Bandwidth.
- Figure 2-11: MCP4821 IDD vs. Ambient Temperature and VDD.
- Figure 2-12: MCP4821 IDD Histogram (VDD = 2.7V).
- Figure 2-13: MCP4821 IDD Histogram (VDD = 5.0V).
- Figure 2-14: MCP4822 IDD vs. Ambient Temperature and VDD.
- Figure 2-15: MCP4822 IDD Histogram (VDD = 2.7V).
- Figure 2-16: MCP4822 IDD Histogram (VDD = 5.0V).
- Figure 2-17: Hardware Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-18: Software Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-19: Offset Error vs. Ambient Temperature and VDD.
- Figure 2-20: Gain Error vs. Ambient Temperature and VDD.
- Figure 2-21: VIN High Threshold vs. Ambient Temperature and VDD.
- Figure 2-22: VIN Low Threshold vs. Ambient Temperature and VDD.
- Figure 2-23: Input Hysteresis vs. Ambient Temperature and VDD.
- Figure 2-24: VOUT High Limit vs. Ambient Temperature and VDD.
- Figure 2-25: VOUT Low Limit vs. Ambient Temperature and VDD.
- Figure 2-26: IOUT High Short vs. Ambient Temperature and VDD.
- Figure 2-27: IOUT vs. VOUT. Gain = 2.
- Figure 2-28: VOUT Rise Time 100%.
- Figure 2-29: VOUT Fall Time.
- Figure 2-30: VOUT Rise Time 50%.
- Figure 2-31: VOUT Rise Time 25% - 75%.
- Figure 2-32: VOUT Rise Time Exit Shutdown.
- Figure 2-33: PSRR vs. Frequency.
- 3.0 Pin descriptions
- 4.0 General Overview
- 5.0 Serial Interface
- 6.0 Typical Applications
- 6.1 Digital Interface
- 6.2 Power Supply Considerations
- 6.3 Output Noise Considerations
- 6.4 Layout Considerations
- 6.5 Single-Supply Operation
- 6.6 Bipolar Operation
- 6.7 Selectable Gain and Offset Bipolar Voltage Output Using A Dual DAC
- 6.8 Designing A Double-Precision DAC Using A Dual DAC
- 6.9 Building A Programmable Current Source
- 7.0 Development support
- 8.0 Packaging Information
© 2005 Microchip Technology Inc. DS21953A-page 29
MCP4821/MCP4822
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
B1
B
A1
A
L
A2
p
α
E
eB
β
c
E1
n
D
1
2
Units INCHES* MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins
n
88
Pitch
p
.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness
c
.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top
α
51015 51015
Mold Draft Angle Bottom
β
51015 51015
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
JEDEC Equivalent: MS-001
Drawing No. C04-018
.010” (0.254mm) per side.
§ Significant Characteristic