Data Sheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- Figure 2-1: DNL vs. Code.
- Figure 2-2: DNL vs. Code and Ambient Temperature.
- Figure 2-3: Absolute DNL vs. Ambient Temperature.
- Figure 2-4: INL vs. Code and Ambient Temperature.
- Figure 2-5: Absolute INL vs. Ambient Temperature.
- Figure 2-6: INL vs. Code.
- Figure 2-7: Full-Scale VOUTA w/G = 1 (VREF) vs. Ambient Temperature and VDD.
- Figure 2-8: Full-Scale VOUTA w/G = 2 (2VREF) vs.Ambient Temperature and VDD.
- Figure 2-9: Output Noise Voltage Density (VREF Noise Density w/G = 1) vs. Frequency.
- Figure 2-10: Output Noise Voltage (VREF Noise Voltage w/G = 1) vs. Bandwidth.
- Figure 2-11: MCP4821 IDD vs. Ambient Temperature and VDD.
- Figure 2-12: MCP4821 IDD Histogram (VDD = 2.7V).
- Figure 2-13: MCP4821 IDD Histogram (VDD = 5.0V).
- Figure 2-14: MCP4822 IDD vs. Ambient Temperature and VDD.
- Figure 2-15: MCP4822 IDD Histogram (VDD = 2.7V).
- Figure 2-16: MCP4822 IDD Histogram (VDD = 5.0V).
- Figure 2-17: Hardware Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-18: Software Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-19: Offset Error vs. Ambient Temperature and VDD.
- Figure 2-20: Gain Error vs. Ambient Temperature and VDD.
- Figure 2-21: VIN High Threshold vs. Ambient Temperature and VDD.
- Figure 2-22: VIN Low Threshold vs. Ambient Temperature and VDD.
- Figure 2-23: Input Hysteresis vs. Ambient Temperature and VDD.
- Figure 2-24: VOUT High Limit vs. Ambient Temperature and VDD.
- Figure 2-25: VOUT Low Limit vs. Ambient Temperature and VDD.
- Figure 2-26: IOUT High Short vs. Ambient Temperature and VDD.
- Figure 2-27: IOUT vs. VOUT. Gain = 2.
- Figure 2-28: VOUT Rise Time 100%.
- Figure 2-29: VOUT Fall Time.
- Figure 2-30: VOUT Rise Time 50%.
- Figure 2-31: VOUT Rise Time 25% - 75%.
- Figure 2-32: VOUT Rise Time Exit Shutdown.
- Figure 2-33: PSRR vs. Frequency.
- 3.0 Pin descriptions
- 4.0 General Overview
- 5.0 Serial Interface
- 6.0 Typical Applications
- 6.1 Digital Interface
- 6.2 Power Supply Considerations
- 6.3 Output Noise Considerations
- 6.4 Layout Considerations
- 6.5 Single-Supply Operation
- 6.6 Bipolar Operation
- 6.7 Selectable Gain and Offset Bipolar Voltage Output Using A Dual DAC
- 6.8 Designing A Double-Precision DAC Using A Dual DAC
- 6.9 Building A Programmable Current Source
- 7.0 Development support
- 8.0 Packaging Information
© 2005 Microchip Technology Inc. DS21953A-page 27
MCP4821/MCP4822
8.0 PACKAGING INFORMATION
8.1 Package Marking Information
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil)
Example:
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
NNN
MCP4821
E/P ^ 256
0524
MCP4821E
SN^^ 0524
256
8-Lead MSOP
Example:
XXXXXX
YWWNNN
4821E
524256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
3
e
3
e