Data Sheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- Figure 2-1: DNL vs. Code.
- Figure 2-2: DNL vs. Code and Ambient Temperature.
- Figure 2-3: Absolute DNL vs. Ambient Temperature.
- Figure 2-4: INL vs. Code and Ambient Temperature.
- Figure 2-5: Absolute INL vs. Ambient Temperature.
- Figure 2-6: INL vs. Code.
- Figure 2-7: Full-Scale VOUTA w/G = 1 (VREF) vs. Ambient Temperature and VDD.
- Figure 2-8: Full-Scale VOUTA w/G = 2 (2VREF) vs.Ambient Temperature and VDD.
- Figure 2-9: Output Noise Voltage Density (VREF Noise Density w/G = 1) vs. Frequency.
- Figure 2-10: Output Noise Voltage (VREF Noise Voltage w/G = 1) vs. Bandwidth.
- Figure 2-11: MCP4821 IDD vs. Ambient Temperature and VDD.
- Figure 2-12: MCP4821 IDD Histogram (VDD = 2.7V).
- Figure 2-13: MCP4821 IDD Histogram (VDD = 5.0V).
- Figure 2-14: MCP4822 IDD vs. Ambient Temperature and VDD.
- Figure 2-15: MCP4822 IDD Histogram (VDD = 2.7V).
- Figure 2-16: MCP4822 IDD Histogram (VDD = 5.0V).
- Figure 2-17: Hardware Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-18: Software Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-19: Offset Error vs. Ambient Temperature and VDD.
- Figure 2-20: Gain Error vs. Ambient Temperature and VDD.
- Figure 2-21: VIN High Threshold vs. Ambient Temperature and VDD.
- Figure 2-22: VIN Low Threshold vs. Ambient Temperature and VDD.
- Figure 2-23: Input Hysteresis vs. Ambient Temperature and VDD.
- Figure 2-24: VOUT High Limit vs. Ambient Temperature and VDD.
- Figure 2-25: VOUT Low Limit vs. Ambient Temperature and VDD.
- Figure 2-26: IOUT High Short vs. Ambient Temperature and VDD.
- Figure 2-27: IOUT vs. VOUT. Gain = 2.
- Figure 2-28: VOUT Rise Time 100%.
- Figure 2-29: VOUT Fall Time.
- Figure 2-30: VOUT Rise Time 50%.
- Figure 2-31: VOUT Rise Time 25% - 75%.
- Figure 2-32: VOUT Rise Time Exit Shutdown.
- Figure 2-33: PSRR vs. Frequency.
- 3.0 Pin descriptions
- 4.0 General Overview
- 5.0 Serial Interface
- 6.0 Typical Applications
- 6.1 Digital Interface
- 6.2 Power Supply Considerations
- 6.3 Output Noise Considerations
- 6.4 Layout Considerations
- 6.5 Single-Supply Operation
- 6.6 Bipolar Operation
- 6.7 Selectable Gain and Offset Bipolar Voltage Output Using A Dual DAC
- 6.8 Designing A Double-Precision DAC Using A Dual DAC
- 6.9 Building A Programmable Current Source
- 7.0 Development support
- 8.0 Packaging Information
© 2005 Microchip Technology Inc. DS21953A-page 15
MCP4821/MCP4822
4.0 GENERAL OVERVIEW
The MCP482X devices are voltage-output string DACs.
These devices include rail-to-rail output amplifiers,
internal voltage reference, shutdown and reset-man-
agement circuitry. Serial communication conforms to
the SPI protocol. The MCP482X devices operate from
2.7V to 5.5V supplies.
The coding of these devices is straight binary, with the
ideal output voltage given by Equation 4-1, where G is
the selected gain (1x or 2x), D
N
represents the digital
input value and n represents the number of bits of
resolution (n = 12).
EQUATION 4-1: LSb SIZE
1 LSb is the ideal voltage difference between two
successive codes. Table 4-1 illustrates how to calculate
LSb.
4.0.1 INL ACCURACY
INL error for these devices is the maximum deviation
between an actual code transition point and its corre-
sponding ideal transition point once offset and gain
errors have been removed. These endpoints are from
0x000 to 0xFFF. Refer to Figure 4-1.
Positive INL represents transition(s) later than ideal.
Negative INL represents transition(s) earlier than ideal.
FIGURE 4-1: INL Accuracy.
4.0.2 DNL ACCURACY
DNL error is the measure of variations in code widths
from the ideal code width. A DNL error of zero would
imply that every code is exactly 1 LSb wide.
FIGURE 4-2: DNL Accuracy.
4.0.3 OFFSET ERROR
Offset error is the deviation from zero voltage output
when the digital input code is zero.
4.0.4 GAIN ERROR
Gain error is the deviation from the ideal output,
V
REF
– 1 LSb, excluding the effects of offset error.
TABLE 4-1: LSb SIZES
Device Gain LSb Size
MCP482X 1x 2.048V/4096
MCP482X 2x 4.096V/4096
V
OUT
2.048V G D
N
⋅⋅
2
n
--------------------------------------
=
111
110
101
100
011
010
001
000
Digital
Input
Code
Actual
Transfer
Function
INL < 0
Ideal Transfer
Function
INL < 0
DAC Output
111
110
101
100
011
010
001
000
Digital
Input
Code
Actual
Transfer
Function
Ideal Transfer
Function
Narrow Code < 1 LSb
DAC Output
Wide Code > 1 LSb