Data Sheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- Figure 2-1: DNL vs. Code.
- Figure 2-2: DNL vs. Code and Ambient Temperature.
- Figure 2-3: Absolute DNL vs. Ambient Temperature.
- Figure 2-4: INL vs. Code and Ambient Temperature.
- Figure 2-5: Absolute INL vs. Ambient Temperature.
- Figure 2-6: INL vs. Code.
- Figure 2-7: Full-Scale VOUTA w/G = 1 (VREF) vs. Ambient Temperature and VDD.
- Figure 2-8: Full-Scale VOUTA w/G = 2 (2VREF) vs.Ambient Temperature and VDD.
- Figure 2-9: Output Noise Voltage Density (VREF Noise Density w/G = 1) vs. Frequency.
- Figure 2-10: Output Noise Voltage (VREF Noise Voltage w/G = 1) vs. Bandwidth.
- Figure 2-11: MCP4821 IDD vs. Ambient Temperature and VDD.
- Figure 2-12: MCP4821 IDD Histogram (VDD = 2.7V).
- Figure 2-13: MCP4821 IDD Histogram (VDD = 5.0V).
- Figure 2-14: MCP4822 IDD vs. Ambient Temperature and VDD.
- Figure 2-15: MCP4822 IDD Histogram (VDD = 2.7V).
- Figure 2-16: MCP4822 IDD Histogram (VDD = 5.0V).
- Figure 2-17: Hardware Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-18: Software Shutdown Current vs. Ambient Temperature and VDD.
- Figure 2-19: Offset Error vs. Ambient Temperature and VDD.
- Figure 2-20: Gain Error vs. Ambient Temperature and VDD.
- Figure 2-21: VIN High Threshold vs. Ambient Temperature and VDD.
- Figure 2-22: VIN Low Threshold vs. Ambient Temperature and VDD.
- Figure 2-23: Input Hysteresis vs. Ambient Temperature and VDD.
- Figure 2-24: VOUT High Limit vs. Ambient Temperature and VDD.
- Figure 2-25: VOUT Low Limit vs. Ambient Temperature and VDD.
- Figure 2-26: IOUT High Short vs. Ambient Temperature and VDD.
- Figure 2-27: IOUT vs. VOUT. Gain = 2.
- Figure 2-28: VOUT Rise Time 100%.
- Figure 2-29: VOUT Fall Time.
- Figure 2-30: VOUT Rise Time 50%.
- Figure 2-31: VOUT Rise Time 25% - 75%.
- Figure 2-32: VOUT Rise Time Exit Shutdown.
- Figure 2-33: PSRR vs. Frequency.
- 3.0 Pin descriptions
- 4.0 General Overview
- 5.0 Serial Interface
- 6.0 Typical Applications
- 6.1 Digital Interface
- 6.2 Power Supply Considerations
- 6.3 Output Noise Considerations
- 6.4 Layout Considerations
- 6.5 Single-Supply Operation
- 6.6 Bipolar Operation
- 6.7 Selectable Gain and Offset Bipolar Voltage Output Using A Dual DAC
- 6.8 Designing A Double-Precision DAC Using A Dual DAC
- 6.9 Building A Programmable Current Source
- 7.0 Development support
- 8.0 Packaging Information
MCP4821/MCP4822
DS21953A-page 14 © 2005 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Positive Power Supply Input (V
DD
)
V
DD
is the positive power supply input. The input power
supply is relative to AV
SS
and can range from 2.7V to
5.5V. A decoupling capacitor on V
DD
is recommended
to achieve maximum performance.
3.2 Chip Select (CS)
CS is the chip select input, which requires an active-low
signal to enable serial clock and data functions.
3.3 Serial Clock Input (SCK)
SCK is the SPI compatible serial clock input.
3.4 Serial Data Input (SDI)
SDI is the SPI compatible serial data input.
3.5 Latch DAC Input (LDAC)
LDAC (the latch DAC synchronization input) transfers
the input latch registers to the DAC registers (output
latches) when low. Can also be tied low if transfer on
the rising edge of CS
is desired.
3.6 Hardware Shutdown Input (SHDN)
SHDN is the hardware shutdown input that requires an
active-low input signal to configure the DACs in their
low-power Standby mode.
3.7 DAC
x
Outputs (V
OUTA
, V
OUTB
)
V
OUTA
and V
OUTB
are DAC outputs. The DAC output
amplifier drives these pins with a range of AV
SS
to V
DD
.
3.8 Analog Ground (AV
SS
)
AV
SS
is the analog ground pin.
MCP4821
Pin No.
MCP4822
Pin No.
Symbol Function
11V
DD
Positive Power Supply Input (2.7V to 5.5V)
22CS
Chip Select Input
3 3 SCK Serial Clock Input
4 4 SDI Serial Data Input
55LDAC
Synchronization input used to transfer DAC settings from serial
latches to output latches
6 — SHDN
Hardware Shutdown Input
—6V
OUTB
DAC
B
Output
77AV
SS
Analog Ground
88V
OUTA
DAC
A
Output