System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Configuring a clock tree with preferred priority
Aastra Proprietary Information Page 2-23
Note: If clock priority 1 was still passed on by node 3, it could
arrive at port P1 in node 3 via node 2. This would lead to a clock
loop and clock recovery in node 3 would continuously switch over
between port P1 and P3.
However, node 2 now receives clock priority 2 at ports P2 and P3. Since this
clock priority is higher than a clock priority possibly adjusted in node 2 (clock
priority 2 has been reserved), the clock is recovered from one of the ports
P2 or P3.
Node 2 now also sends out clock priority 2 in the downstream direction. In
node 3, clock priority 2 is now being received at preferred port P1.
However, since node 3 receives clock priority 1 at port P3, the clock is
continued to be recovered from port P3. The formation of a clock loop is
thus prevented.
Figure 2.9: Clock transmission with preferred clock priority 1: Signal loss at
port 1 in node 2
Priority 1 clock failure
If the priority 1 clock fails in node 1, clock control in the network is performed
with the clock priority 3 assigned in the clock priority list, since clock
priority 2 has been reserved.
Node 1 Node 2 Node 3
T3in=Priority 1
VP "1"
VP
VP
P3
P2
P1
P2P2
P1 P1
P3
TP1
TP2
TP2
TP2
Clock priority 2 reserved. No clock loop.
"1"
"1"
Tint=Prio.2