System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Clock switchover
Aastra Proprietary Information Page 2-17
2.3.4 Clock switchover
The internal clock of a node run at a reference clock such as the T3in clock
or the Rx clock of a port is digitally detuned to the frequency of this reference
clock. In doing this, a resolution of
1/8 Hz is achieved.
If the reference clock fails, the node switches over to the detuned internal
node clock.
After switchover, the detuning of the internal clock is eliminated in individual
steps until it runs again using its own frequency and precision.