System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Synchronization
Page 2-12 Proprietary Information Aastra
2 Mbit/s signal at F1out
Figure 2.5: Synchronization procedure
CRC4 procedure
Code conversion
binary/HDB3
Tx multiframe
phase
adaptation
Multiframe
alignment
CRC4 multiframe
alignment
Frame alignment
Phase adaptation
to the Tx frame
Code conversion
HDB3/binary
Bit
synchronization
Bus line
Tx frame
2 Mbit/s signal at F1in