System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
CRC4 procedure
Aastra Proprietary Information Page 2-9
CRC4 frame structure
The multiframe for the cyclic redundancy check (CRC) is composed of
16 frames. This multiframe is divided into section I and section II, each
being composed of 8 frames. Thus, one multiframe section includes 2048
bits. It forms one block for the redundancy check.
Figure 3-4 below gives a detailed overview of the CRC4 multiframe.
Bit X in position 1 of the frame alignment signal is used to transmit the CRC4
signature (C1, C2, C3 and C4). The four CRC bits are transmitted serially in
this position. Thus, four (4) frame alignment signals are required for
transmitting one CRC4 signature.
Bit X in position 1 of the service digits is used to transmit a CRC4 multiframe
alignment signal.
SiI, SiII: Signalling bits for multiframe sections I and II.
D: Service digit, urgent alarm
N: Service digit, non urgent alarm
Y: Control and signalling bit
C1, C2, C3 and C4: 4 CRC-bits (Cyclic Redundancy Check)
RKW: Frame alignment signal
MW: Service digits
Figure 2.4: CRC4 frame structure
Table 2.F: CRC4 frame structure
Multiframe Frame
Bits 1 to 8 of time slot 0 of a frame
12345678
CRC4 multiframe
I
0 C10011011RKW
1 0 1 D N Y5Y6Y7Y8MW
2 C20011011RKW
3 0 1 D N Y5Y6Y7Y8MW
4 C30011011RKW
5 1 1 D N Y5Y6Y7Y8MW
6 C40011011RKW
7 0 1 D N Y5Y6Y7Y8MW
II
8 C10011011RKW
9 1 1 D N Y5Y6Y7Y8MW
10 C20011011RKW
11 1 1 D N Y5Y6Y7Y8MW
12 C30011011RKW
13 SiI 1 D N Y5Y6Y7Y8MW
14 C40011011RKW
15 SiII 1 D N Y5Y6Y7Y8MW