System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
CRC4 procedure
Page 2-8 Proprietary Information Aastra
2.2.2 CRC4 procedure
The CRC4 procedure (CRC= cyclic redundancy check) is used
• to avoid malsynchronization due to pretended synchronization
patterns (pretended frame alignment signals)
• and to detect even low bit error ratios (BER = 10
-6
).
The so-called CRC4 signature consists of four bits referred to as C1, C2, C3
and C4. These four bits are determined using the CRC4 algorithm.
CRC4 algorithm
The four bits C1, C2, C3 and C4 of the CRC4 signature are calculated over
a data block of 8 frame lengths (2048 bits) using the CRC4 algorithm and
are transmitted in the next multiframe.
In this calculation, the data block is considered as polynomial in x, the
coefficients of which can assume the values 0 or 1.
The first data bit corresponds to the coefficient of the highest power in x. The
data block is first multiplied by x4 and then divided by the polynomial x4 + x
+ 1 (exclusively modulo 2 operations). The remaining value forms the C1,
C2, C3 and C4 signature, C1 being the most significant bit.
Figure 3-3 shows the circuit required for this operation.
Figure 2.3: Circuit for implementing the CRC4 algorithm
All 2048 bits of the multiframe are involved in this operation. Each step
produces a bit combination (C1 to C4). However, the correct CRC4
signature is available at outputs C1 to C4 only after all 2048 bits have been
passed through the circuit.


x
3
C
1
x
2
C
2
x
1
C
3
x
0
C
4
The circuits referred to as x0 to x3 are 1-bit shift registers.