System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
V.24 module
Aastra Proprietary Information Page 9-23
Asynchronous (transparent) with oversampling
Data rate
0 to 1200 bit/s as 8 kbit/s stream acc. to V.110
(sampling rate: 4800 Hz)
up to 2400 bit/s as 16 kbit/s stream acc. to
V.110
(sampling rate: 9600 Hz)
up to 4800 bit/s as 32 kbit/s stream acc. to
V.110
(sampling rate: 19200 Hz)
up to 9600 bit/s as 64 kbit/s stream acc. to
V.110 sampling rate: 48 kHz)
Signal distortion
 25 % without R.111, with R.111  6.25 %
Synchronous (full-duplex n  64 kbit/s, n =1 to 8)
Data rate
Synchronous (full-duplex)
64 kbit/s
128 kbit/s
192 kbit/s
256 kbit/s
320 kbit/s
384 kbit/s
448 kbit/s
512 kbit/s
9.9.4 V.24 module
Interface data
Interface definition in compliance with ITU-T V.24
Electrical characteristics in compliance with ITU-T V.28
Number of interfaces on the module 2
Electrical V.28 interface
Source voltage approx.  9 V, across Ri  300 Ohms
Short-circuit current typically
 10 mA
Maximum line length 15 m
Assignment of line conditions
Control and clock line status  -0.3 V corresponds to "OFF" condition
Data line status
 -0.3 V corresponds to "1"
Control and clock line status
 +0.3 V corresponds to "ON" condition
Data line status
 +3V corresponds to "0"
Asynchronous transmission
Data rate 0 to 19.2 kbit/s, transparent
Oversampling possible at 8 kHz, 16 kHz, 32 kHz and 64 kHz
Signal distortion
 25 % without R.111, with R.111  6.25 %
Table 9.J: DSK Modular