System information

FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Clock supplied to the XMP1 PDH kernel
Page 3-14 Proprietary Information Aastra
3.6.4 Clock supplied to the XMP1 PDH kernel
The SETG function of the SCU provides the SDH system clock T0, but not
the PDH system clock (for the XMP1 Central Unit).
From the network management view, the different hardware parts of the
SDH-based SETG and the PDH variant PET are not visible. The NMS only
displays the SETG.
However, it is possible to apply the SDH system clock T0 to the PET
function. In this case, the SDH system clock T0 can be used by the PET
function for clock selection.
This setting is made in the SOX via sub-address 1 of the Central Unit using
the Properties -> SDH Clock menu item and the "Use SDH clock" setting.
The default setting of the system does not
provide the use of the SDH clock
for the PET function.
The following diagram shows the interaction between SETG and PET from
the network management view.
Core Unit A
SETG
function
Ext.
Y-cable
External
clock T3
Ext.
Y-cable
External
clock T4
Core Unit B
SETG
function
Inter-core
sync
T4
T4
System clock
T0
System clock
T0
T1
T1
9.72
MHz
Squelch
control
T3
T2
T2
T3
Figure 3.6: Clock with SCU redundancy