Specifications

Table 28, POST - Code

POST-Codes

During the Power On SeEfTest, POST codes are sent to I/O port 80h. Each routine

number (hexadecimal) is sent to the post Port before the routine is called. The fol-

lowing table lists all possible POST codes:

Code Function Description

00h (None) Hook for Cpu type detection (CPU extension)

01h Timer Reset Initializes the timer

02h DMA Reset Initializes the DMA controller

03h IRQ POST Initializes the interrupt controller

04h RTC Reset Initializes RTC control registers

05h KBD Reset Initializes the keyboard Error codes: BAh...BFh

06h Video Blank Clears screen (if 684~ present)

07h NVS Checksum Calculates CMOS checksum

08h NVS Default Initializes CMOS if checksum bad

09h ROM Checksum

Calculates ROM checksum, system halted if

checksum bad

10h Memory Sizing Checks memory presence, saves size in CMOS

11h POST Setup Initializes memory, sets interrupt vectors

12h Setup Option ROM Initializes option ROM table

15h Timer Test Enables timer IRQ (INT8)

16h NCP POST Detects co-processor

17h KBD Setup

Set up keyboard variables (in data area),

enables keyboard IRQ (INT9)

18h Vide o POST Initializes ISA video if presen

19h Option POST

Detects non-video option ROMs, stores r in

option ROM table

1Ah Display POST Set up POST window, displays early results

25h (None)

PS/2 mouse init hooks here if PS2M extension

is present

26h Floppy POST Detection and initialization of floppy disk drives

27h (None)

IDE hard disk init hooks here if FIXED extension

is present

28h Serial POST Detection and initialization of serial ports

29h Parallel POST Detection and initialization of parallel ports

6.1.3