Installation guide

Compact Board PCM- 8500

Appendix A Programming the Watchdog Timer A-2

A.1 Watchdog timer of PCM-8500

PCM-8500 utilizes ITE 8712 chipset as its watchdog timer controller.

Here are the procedures below to complete its configuration and the

AAEON intial watchdog timer program is also attached based on

which you can develop customized program to fit your application.

A.2 Configuring sequence description

After the hardware reset or power-on reset, the ITE 8712 enters the

normal mode with all logical devices disabled except KBC. The initial

state (enable bit ) of this logical device (KBC) is determined by the

state of pin 121 (DTR1#) at the falling edge of the system reset

during power-on reset.

Hardware Reset

Wait for key string

Check Pass key

MB PnP Mode

Next Data?

Is the data “87h”?

Last Data?

Any other I/O transition cycle

I/O write to 2Eh

Any other I/O transition cycle

I/O write to 2Eh

Hardware Reset

Wait for key string

Check Pass key

MB PnP Mode

Next Data?

Is the data “87h”?

Last Data?

Any other I/O transition cycle

I/O write to 2Eh

Any other I/O transition cycle

I/O write to 2Eh

Hardware Reset

Wait for key string

Check Pass key

MB PnP Mode

Next Data?

Is the data “87h”?

Last Data?

Any other I/O transition cycle

I/O write to 2Eh

Any other I/O transition cycle

I/O write to 2Eh